Nvidia is pressing its memory vendors to push beyond JEDEC’s official HBM4 baseline. According to data-analytics-id=”inline-link” href=”https://www.trendforce.com/presscenter/news/20250918-12719.html” target=”_blank” data-url=”https://www.trendforce.com/presscenter/news/20250918-12719.html” referrerpolicy=”no-referrer-when-downgrade” data-hl-processed=”none”>TrendForce, the company has requested 10Gb/s-per-pin stacks for its 2026 Vera Rubin platform, a move designed to raise per-GPU bandwidth ahead of AMD’s next-generation MI450 Helios systems.
At 8Gb/s per pin — the rate JEDEC specifies for HBM4 — a single stack delivers just under 2 TB/s across the new 2,048-bit interface. Raising that to 10Gb/s bumps the total to 2.56 TB/s per stack. With six stacks,…
